Scaling down of complementary metal-oxide semiconductor (CMOS) transistors results in increased power consumption and short channel effects. Tunnel field-effect transistors (TFETs), which use a band-to-band tunneling (BTBT) mechanism for on-current, have been investigated as one of the more promising next-generation devices for low-power applications. TFETs are devices suited for low power applications because the current in a TFET is generated through tunneling. As a result, the subthreshold swing (SS) of a TFET can be lower than about 60 mV/decade (dec) at room temperature, which is the lower limit for subthreshold swing in a conventional metal-oxide-semiconductor field-effect transistor (MOSFET). Subthreshold swing refers to the gate voltage required to change drain current by one order of magnitude.
In practice, however, the subthreshold swing of a TFET is compromised by other parasitic carrier transport mechanics, such as trap assisted tunneling due to the overlap of a gate dielectric with the tunnel junction. Due to the overlap, interface traps at the tunnel junction cause a carrier from a source region to be trapped at an interface between a tunnel junction and a gate dielectric, resulting in parasitic current and increases in the subthreshold swing of the TFET. As a result, a subthreshold swing below 60 mV/dec is rarely obtained in a conventional TFET.
Accordingly, there is a need for an improved TFET and a method of manufacturing same which minimizes the impact of trap assisted tunneling.